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Xilinx Adaptive Solutions for Aerospace and Defense Radar and EW Systems
February 4, 2021 UTC-7
n this webinar, Xilinx will describe how their latest platforms can be used to create adaptable solutions for next generation radar and EW systems.
The webinar will address how Xilinx platforms can meet the requirements of this technically challenging industry.
- The RFSoC (radar frequency system on chip) family creates game-changing performance by integrating high sample rate data converters into the silicon of the Ultrascale+ system on chip.
- The HBM (high bandwidth memory) family performs similar improvements for digital recording by incorporating memory into the package.
- And the Xilinx 7-nm family, Versal, is a truly adaptive computing Adaptive SoC providing the processing and flexibility to address the needs of aerospace and defense customers.
Market Segment Manager – Aerospace & Defence
Avnet Silica
Paul Leys is the Market Segment Manager for the Aerospace and Defense business at Avnet Silica.He supports the Avnet Silica EMEAI A+D business with the team of local Account Managers and FAEs. He has supported this business for over 25 years and has a particular passion for the Avionics industry. The Avnet Silica goal is to be able to offer a wide range of reliable and leading edge electronic component solutions to its Highrel customers.
Paul holds a BSc in Electronics and Electrical Engineering from Edinburgh University.
A&D’s Radar/EW Systems Architect
Xilinx
Jason leads and manages Xilinx’s overall efforts for our existing and new products in the Radar/EW market globally.
Before he joined Xilinx Jason worked for BAE Systems in Nashua, NH for 8 years doing FPGA, mixed signal and digital design on IR and EW systems for programs like JSF and then moved to California to work for Sun Microsystems (Oracle, Inc.) doing FPGA design for next gen blade server systems. After getting married and starting his family, he moved back home to Illinois working for Northrop-Grumman Corporation for 6 years in his most recent role serving as the digital design lead and FPGA architect on an IR countermeasure system and a next-generation EW systems. He was responsible for technical direction of FPGAs spanning an entire RF product line and championed adoption of new technologies like Xilinx’s RFSoC. Xilinx selected Jason for the XACE program where he served as a sector wide Xilinx/Vivado expert within NGC.
Jason has a Master’s Degree in Electrical Engineering and a Bachelor’s Degree in Electrical Engineering & Literature from Massachusetts Institute of Technology (MIT).
